1. Field of the Invention
The present invention relates to logical-physical conversion processing when a bit error occurs in a nonvolatile semiconductor memory due to read disturb and the like.
2. Description of the Background Art
Among nonvolatile memories, a NAND flash memory can bring about high integration and reduction in manufacturing cost by a simple circuit configuration, and make writing by a user easier, thereby being employed in an SD memory card and the like in abundance.
Recently, the NAND flash memory has also been employed in a game machine and the like. When the NAND flash memory is used in the game machine and the like, writing does not occur, but continuous reading occurs. That is, the NAND flash memory is increasingly employed as a ROM.
However, since in the game machine and the like, a specific program is often read repeatedly, a possibility that the program is unintentionally rewritten is beginning to be pointed out. This phenomenon is called a “read disturb” phenomenon (e.g., refer to Japanese Patent Application Laid-Open No. 2008-192267).
As described in Japanese Patent Application Laid-Open No. 2008-192267, when binary data stored in a selected cell is repeatedly read, there is a possibility that a threshold voltage of an unselected cell shifts, and that binary data that the unselected cell stores is unintentionally rewritten from 1 to 0 (this is called a “read disturb” phenomenon).
A bit error herein is not an irreversible error due to physical damage (in this specification, referred to as a permanent late defect) but a reversible error caused by the stored binary data changing with time (in this specification, referred to as a tentative late defect). Particularly, a bit error due to read disturb (read disturb error) is caused by repeatedly executing reading processing in a specific storage area of the flash memory without performing writing and erasing.
As a technique for preventing the “read disturb” phenomenon is cited the foregoing Japanese Patent Application Laid-Open No. 2008-192267.
However, processing for repairing the above-described bit error is highly loaded processing involving reading of the data, error correction, erasing/writing of the data after the correction and the like. Accordingly, if the repair processing is frequently performed, data reading processing from the NAND flash memory may be affected, so that an ongoing game may not normally behave.
Moreover, it is considered that the erasing/writing or the like causes the foregoing uncorrectable late defect (permanent late defect) in a block making up the NAND flash memory.